Wafer level packaging (WLP), as it is known, is a particularly cost-effective method of producing true chip-size packages, that is to say components of only chip size. These components are distinguished by the fact that the individual chips are soldered or adhesively bonded, with the active side downward, generally to small solder or gold bump contacts on the printed circuit board or the module board, that is to say in general terms the module carrier, and do not have to be housed further (naked chips). In this case, following the mounting of the chip, all the connections of the chip are in the shadow of the silicon, that is to say directly underneath the latter. Outside the memory area, multi-chip modules also demand the assembly of many different components. The drawbacks with WLP housing technology are, firstly, that the components are susceptible to mechanical damage, since the rear of the chip is unprotected. In addition, the spacing of the connections (pitch) has to be reduced in the case of a large number of connections, in order to accommodate them all under the component. This requires expensive module carriers, which do not meet the Standard. One solution to this would be to arrange the connections in a “fan-out” arrangement, that is to say they are located outside the chip shadow. Conventional packages (TSOP, BOC) are therefore constructed in such a way that the connecting contacts are not fitted directly to the chip but to a lead frame/interposer, which is larger than the actual chip and surrounds the latter, so that a standard pitch can be complied with and conventional module carriers can be used. However, the use of the lead frame or an interposer is expensive and complicated.
A further drawback of conventional technologies is that the function of a finished component module, for example a memory module, can be determined only after permanent contact has been made, for example after all the components (that is to say for example memory modules and passive components) have been soldered in. If a chip or another component then does not function, complicated manual repair work is necessary. This also applies to all other multi-chip modules.
The invention is therefore based on the problem of specifying a process for producing a component module which provides a remedy here and eliminates the aforementioned drawbacks.
In order to solve this problem, a process for producing a component module comprising a module carrier and a plurality of components with which contact is made on the latter is provided, comprising the following steps:                arranging separated components on a surface-adhesive film at a predefined contact-specific spacing from one another,        embedding the components in a flexible material in order to form a flexible holding frame which holds the components,        pulling off the film,        producing contact-making elements on the exposed side of the components,        performing a functional test of the components and, if necessary, repair and/or replacement of components, and        fixing and making contact with the components held in the holding frame on the module carrier.        